One problem that occurs in electronic systems containing semiconductor packages, such as modules and printed circuit boards (PCB), is parasitic inductance. For example, parasitic inductance can occur from switching transients and cross coupling between the conductors (e.g., wires or traces) that electrically connect different semiconductor packages of the system. Parasitic inductance can cause transient voltages, spurious signals, and power supply noise, which degrade the operation of the semiconductor packages, and adversely affect the performance of the system. Parasitic inductance can also make testing more difficult because false readings are obtained, making electrical evaluation of the system more difficult.
One technique for overcoming parasitic inductance is by filtering the transient voltages, spurious signals and power supply noise. For example, external decoupling capacitors can be surface mounted on a system substrate, such as a printed circuit board (PCB) or test board, in close proximity to the semiconductor packages.
As the operating speeds of electronic systems increase, the problems associated with parasitic inductance increase. For example, the parasitic inductance associated with circuit connections to the decoupling capacitors decreases their effectiveness at higher speeds. Parasitic inductance is particularly a problem at clocking speeds of 500 mHz or more.
Electronic systems are also becoming more densely populated. External decoupling capacitors require valuable amounts of surface area on substrates, which could be utilized for other components and circuits. Yet another problem with external decoupling capacitors is that they are susceptible to shorting, and also to mechanical damage due to their surface mounting.
In view of these shortcomings associated with external decoupling capacitors, semiconductor packages have been constructed with on-board capacitors. For example, U.S. Pat. Nos. 6,891,248; 7,002,248 and 7,041,537 to Akram et al. disclose semiconductor packages having on board capacitors. In these patents, redistribution layers on the packages are used to form integrated capacitors having electrodes separated by dielectric layers.
The present disclosure is directed to semiconductor packages having discrete components that are embedded in an active die of the package. The present disclosure is also directed to a method for fabricating semiconductor packages with discrete components, and to electronic systems containing the semiconductor packages.